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AXI

Muthuvenkatesh

Why burst must not cross 4kb  in AXI ?

  • 0
    Hi Venketesh,

    Below factors controls the burst:
    Burst_length: AxLEN[7:0]
    Burst_size : AxSIZE[3:0]
    Burst_type : AxBURST[1:0]

    While length can be 1 to 256 for an INCR, size could be 1 to 16, the max burst can be 256*16 giving a size of 4KB.
    I hope this helps.

    Regards,
    Nishant
  • 0 in reply to Ninjaseek
    Hi Nishant,
    I understand what you are saying, But what is the reason for that.
    Axsize is also 3bit not 4 bit.
    Thanks
    Muthuvenkatesh
  • 0
    Hello Muthuvenkatesh,

    The 4KB boundary size is essentially a trade-off between supporting a large enough minimum slave size (which could be covered entirely with a single burst and also simplifies address decoders) and wasting too much space for slaves that do not require large address ranges.

    Also, although the AXI protocol is independent from the ARM processor architecture, the 4KB boundary size conveniently matches the smallest granule size supported in the ARM VMSA (v7LPAEs, v8 onwards). This guarantees that bursts will never cross the boundary that is described by the smallest virtual to physical address translation page table.

    Hope this helps.

    Kind regards,
    Simone