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RMW operation on SRAM via AXI

I am implementing Read Modified Write on SRAM through AXI. What is the role of awsize and wstrbe?

Say data width is 64 bits, and awsize is set to support 64-bits, but the underlying wstrbe are only valid for lower 32-bits (8'b0000_1111). Does this candid for RMW operation? Or, it solely should depend on awsize and supported data widths?

 

Thanks.

  • AWSIZE indicates the maximum width of a write transfer, with WSTRB then indicating the actual bytes to be updated within that indicated maximum transfer width. For a single data transfer the AWSIZE information is probably redundant, but for an incrementing burst of transfers you would need to know the AWSIZE value to know how much to increment the transfer address by.

    For your RMW example the WSTRB value just tells the SRAM that it is only the lower 32-bits of the memory location that are being modified. Alternatively the master could have used AWSIZE to indicate a 32-bit write. The resulting locations updated in the SRAM slave would be the same in both cases for a single transfer access.