Hello, I'm Kim.
I'm working on SoC design.
I have to integrate coresight infrastructure into our design.
We are using the coresight SoC600 and STM500.
According to the STM500 integration manual, STM500 requires up to 16Mbytes of address space, prividing 65536 spearate channel, using AWADDR bit[23:8].
Our platform's memory map is as follows :
0x11E0_0000 : Other Peripherals.
0x11D0_0000 : STM500
0x11C0_0000 : GIC500
...
We have allocated 16MB address space for each IP.
Therfore, we can use STM500.AWADDR[19:8] bits to support 4,096 channel ID
Unless the channel ID requires more channel, we might not need to modify the memory map.
However, I'm unsure how the software, OS, or Linux kernel will use the channel IDs at runtime.
Our system is not as large as an HPC or server platform.
It consists of Cortex-A53 MP4 cores, a Mali GPU, a Cortex-M0+, and a Cortex-M7.
I would like to know if 4,096 channel IDs are sufficient for our system.
Thanks & Regards
Daehwan Kim.