In AXI-5, can BVALID be asserted on same cycle as WLAST?

Hi,

AMBA AXI specification (version K) section A3.5.1 says,

"The Subordinate must also wait for WLAST to be asserted before asserting BVALID. This wait is because the write response, BRESP, must be signaled only after the last data transfer of a write transaction."

I couldn't find a statement in specification which says asserting BVALID and WLAST at the same time is prohibited.

Can you please confirm whether it is allowed to assert BVALID on same cycle as WLAST or not?