Hello, I am using the AXI4 protocol and I wonder if I can create a read-modify-write access just by modifying the write_strobes signals.
Is it possible, or do write strobes signals always have a determinate value? Here is an example:
AXI WRITE ACCESS:
* WRITE SIZE= 32bits
* Write address= 0
* Write fixed
* Wdata= EEEE ABCD
For a normal access, the strobe should be equal to h'F = b'1111, and no read-modify-write access should occur. BUT, if I replace the strobe with h'C= b'1100, will it cause a read-modify-write (only writing EEEE in the register) or am I violating the protocol? The AXI specification just indicates that strobes at '0' indicate a invalid data, can we force data to be invalid to cause RMW accesses?
Same question for unaligned acesses:
* Write address= 1
For a normal access, the strobe should be equal to h'E = b'1110 indicating that "AB" will be written at address 1, a read-modify-write access should occur to fill value at address 0. BUT, if I replace the strobe with h'C= b'1100, will it cause the read-modify-write (only writing EEEE in the register) on address 1 also?
Thanks for taking time to answer!
The protocol uses WSTRBs to help you to avoid a read-modify-write sequence.
The target subordinate should use the WSTRB information to determine which byte lanes need updating. If the subordinate can update individual bytes, good. If not it might need to locally perform a R-M-W sequence, but this being invisible to the AXI bus.
Looking at your questions, yes to both of them, it would just be the EEEE value that gets updated in the target subordinate. How that subordinate implements the byte write isn't defined. Hopefully with byte enables, but othewise using a R-M-W sequence.
Thank you very much for your answer.