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Why should PSTRB be driven low for read transfers?

Why does APB4 require the byte strobes to be driven low during read transfers?

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  • PSTRB is a WRITE strobe, so it has no meaning for read transfers. If a write strobe was active during reads it might lead to confusion.

    I guess you are asking from the perspective of "if it has no meaning during reads, why mandate that it is driven low", so I'd guess it has a defined value during reads so that no wrong assumptions can be made as to what PSTRB might indicate during reads.

    As an example, someone might want to use PSTRB to enable registers on the PWDATA bus in their peripheral design, so knowing that PSTRB will be low during reads means they don't have to qualify PSTRB with PWRITE.

    As the APB protocol supports one source (usually a bridge from another protocol) and multiple peripherals, it is simpler for the single source to mask PSTRB during reads, compared to each possible target peripheral having to do the masking.

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  • PSTRB is a WRITE strobe, so it has no meaning for read transfers. If a write strobe was active during reads it might lead to confusion.

    I guess you are asking from the perspective of "if it has no meaning during reads, why mandate that it is driven low", so I'd guess it has a defined value during reads so that no wrong assumptions can be made as to what PSTRB might indicate during reads.

    As an example, someone might want to use PSTRB to enable registers on the PWDATA bus in their peripheral design, so knowing that PSTRB will be low during reads means they don't have to qualify PSTRB with PWRITE.

    As the APB protocol supports one source (usually a bridge from another protocol) and multiple peripherals, it is simpler for the single source to mask PSTRB during reads, compared to each possible target peripheral having to do the masking.

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