In ACE, the Transaction share domain is divided into Non-shareable, Inner, Outer, and System. Where Inner mentions that transactions in the Inner domain do not affect the Cache Line in the Outer domain.I would like to ask the following questions:0. Can it be understood as follows: Suppose that Core0, Core1 and Core2 share Cache Line a, where Core0-1 belongs to the Inner domain and core0-2 belongs to the Outer domain. If Core0 initiates an Invalid operation with ARDOMAIN 01 (Inner) for Cache Line a, Cache Line a in Core1 will be Invaild without affecting Core2. Is it no longer accurate that Core0's state of a is Unique?1. Who is the divider of Inner and Outer? (CPU specification or architect?)2. Is the division of Inner and Outer arbitrary or have special requirements? Are more than one Inner allowed in an Outer? (I saw a post saying that a Cluster is divided into Inner, so there are more than one Inner in the Outer? Is that reasonable?
Look forward to your guidance, thank you
> In ACE, the Transaction share domain is divided into Non-shareable, Inner, Outer, and System. Where Inner mentions that transactions in the Inner domain do not affect the Cache Line in the Outer domain.
It's worth clarifying that in ACE5, the Inner domain is deprecated. This effectively means that Non-Shareable, and System shareable requests do not generate snoops. Outer Shareable requests will generate snoops.
AMBA4 ACE, both Inner and Outer shareable requests could generate snoops, and should ensure hardware coherency is used.
> I would like to ask the following questions:0. Can it be understood as follows: Suppose that Core0, Core1 and Core2 share Cache Line a, where Core0-1 belongs to the Inner domain and core0-2 belongs to the Outer domain. If Core0 initiates an Invalid operation with ARDOMAIN 01 (Inner) for Cache Line a, Cache Line a in Core1 will be Invaild without affecting Core2. Is it no longer accurate that Core0's state of a is Unique?
Yes, that would be correct.
> 1. Who is the divider of Inner and Outer? (CPU specification or architect?)
It's a system architecture decision. The CPU defines which address regions are in the Inner and Outer shareable domain, which would affect what is broadcast externally of the CPU. The interconnect might define which managers are in which domain when it is propagating snoops.
> 2. Is the division of Inner and Outer arbitrary or have special requirements? Are more than one Inner allowed in an Outer? (I saw a post saying that a Cluster is divided into Inner, so there are more than one Inner in the Outer? Is that reasonable?
D1.6.1 in the AXI.H Specification gives some examples of how Domains could be set up.
Multiple Inner domains can be within the same Outer domain.