Hi, everyone:
We are using the Arm Artisan GPIO library. The following is the part of IO cell's truth table.
The core down mode says, when DVDD is power on , VDD is power down and the SNS keeps LOW, the output PAD state is Hi-z.
The retention mode says,when DVDD and VDD are power on ,The RTO keeps LOW, the output PAD state is Retained.
The fail-safe mode says,when DVDD is power off ,the output PAD state is Hi-z.
Am I correct?
What is the application scenarios for the above three modes?
Thank you very much!
input
output
Comments
DVDD
RTO
SNS
OE
DS0
DS1
SR
PE
PS
A
PAD
1
X
0
Hi-Z
VDD core down
L
Retained
Latch and retention mode
Fail-safe mode
X- on inputs imply a 0 or a 1.
L- latched, current state of input signal is latched.
Retained-The output is retained based off the latched input signals.