We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
I have an AXI4 initiator that issues a 32-bit read request to an AXI target (memory) via a 64-bit wide data bus.
I set the ARSIZE parameter to 2.
The data in the target memory are the following:addr : data0x000: 64'h 77_66_55_44_33_22_11_000x100: 64'h 00_00_00_00_00_00_00_00
I am getting the following response data at the initiator interface:
In all cases, burst_type = INCR and burst_len = 0
case1: raddress = 'd0; ARSIZE= 'd2;rdata_rcvd: 64'h 77_66_55_44_33_22_11_00 rdata_expected = 64'h 77_66_55_44_33_22_11_00
case2: raddress = 'd4; ARSIZE= 'd2rdata_rcvd: 64'h 77_66_55_44_33_22_11_00 rdata_expected = 64'h xx_xx_xx_xx_77_66_55_44
case3: raddress = 'd5; ARSIZE= 'd2
rdata_rcvd: 64'h 77_66_55_44_33_22_11_00 rdata_expected = 64'h xx_xx_xx_xx_77_66_55_44
In case2 and case3, I expected that the slave aligns the 32-bit data on bits 0 to 32 of the 64-bit data bus.Does the slave behaves correct or my understanding of ARSIZE parameter is wrong?
Ok. Thank you for the answer