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[Cortex-R82] Enable Dcache fail in FVP

Hi, All:

I used FVP_BaseR_AEMv8R to debug cortex r82 . An exception occurred after enabling dcache in SMP mode.

Any idea on where I'm doing something wrong?

Boot process:

1. cpu0 boot from EL2, other cpu wait cpu0 kick;

2. cpu0 change to EL1;

3. cpu0 enable MPU and dcache;

4. cpu0 kick other cpu;

5. other cpu enable MPU and dcache;

The program stopped at step3, and no exception was reported.

  • Hi Zyfeier,

    Since you want to debug Cortex-R82, I suggest you use FVP_BaseR_Cortex-R82x1 which is contained in FVP Std package. The package can be downloaded from this link if you license FVP. Click "Download fro Linux" button. The FVP is license protected so you must have a license for downloading and running it.

    If you don't have an FVP license so you need to use FVP_BaseR_AEMv8R, can you please provide more details things like:

    • FVP version
    • The model parameter setting (command line switches)
    • Snippet code that enables MPU and dcache or TarmacTrace log

    To get TamacTrace log, please load the TarmacTrace plugin (FVP_Base_AEMv8R/plugins/Linux64_GCC-9.3/ by --plugin switch.

    For more details about the TarmacTrace plugin, please see the doc below.

    Kind regards,