Understanding reset sequence Cortex M0?

Dear All,

In FlashLoader_ASM();, There are main 2 thing operations.

1. Get initial MSP value

2. Get initial PC valie.

 in gpio_tests  example, 

HADDR[11:0] has got  000---------->004--------->20C--------->2C8--------->2C4--------->2C8--------->2CC

HRDATA[31:0] has got --------------->20000208->010002c5->00000000->00000000->47804806->47004806

it meant that MSP is 20000208 and PC 010002c5,  and PC will indicate that it jumps to reset_handler  and executing the instructions I think.

 From here, But I got some questions.

1. Why does not bootloader.HADDR increase at the some specific range 004--------->20C not 004--------->008?

2. Similar question of 1, bootloader.HADDR go with 2C8--------->2C4--------->2C8--------->2CC, but my expectation was that 2C8--------->2CC--------->2D0--------->2D4 not 2C8--------->2C4--------->2C8--------->2CC. Why does not HADDR increase sequentially?

3. I found some miss matched value in bootloader.HRDATA[31:0] with bootloader.hex(boot_hex.txt) But I can't understand why it is miss matched between HRDATA and bootloader.hex image file?