This may be the wrong forum for this, so please forgive.
In the AMBA specification document, (page 44), it says: When the interconnect is required to determine the destination address space or Subordinate space, it must realignthe address and write data. This realignment is required to assure that the write data is signaled as being valid onlyto the Subordinate that it is destined for.
As I understand the specification, there are separate valid/ready handshake signal for each device on the bus, therefore this paragraph makes no sense. In other words, if a given master is handshaking with a given device (master or slave), then it must be assumed that the address and data are in alignment for that device. So what "realignment" are they referring to, and why would the data go to any other subordinate if there is no handshaking to any other subordinate?
Reading this text in context makes a bit more sense.
The text before this quotation is describing that the AXI channels allow write data to appear before write addresses, so the "realignment" being referred to is a "time" realignment. If W channel transfers are available before AW, the interconnect would stall the W transfers until it knows the target being addressed by the later received AW transfer, so that only the required target would see the W transfers.
So by stalling the W transfers (by buffering them or just holding WREADY low), the interconnect has realigned the transfers such that AW now precedes W (or is signaled at the same time).
Thanks, that does make more sense now. In the specification, it didn't indicate that W transfers could precede A transfers, therefore I wasn't aware of this. I'm not sure why that would happen in the first place, unless a module internally was for some reason restricted to a certin data width, and was muxing data and address through the same slices. Thanks again - J. B.