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Run problem on the Corstone SSE-300 (MPS3) simulator

Yevgenyy

Hi,

Could someone tell me, please, what could be the issue if everything works on the -O3 optimization, but on the -O0 it stops working at the entrance to the "main()" function (freeze)?

Thanks.

Parents Reply Children
  • 0 Arm Employee Badge in reply to Yevgenyy

    Yes, this view would require cycle accurate trace, which is only available on certain hardware platforms (I don't think any Cortex-M can generate this).

    However there are some potential solutions. You can get some high level statistics by adding --stat to the command options when the model is launched, which will generate some timing info when you exit.

    You can also use the CYCCNT register in your code to start and stop the counter, and return the value in your code. Some sample code I've used before is below.

    #define CM_DEMCR               (*((volatile uint32_t*)0xE000EDFC))
#define CM_TRCENA_BIT          (1UL<<24)

#define CM_DWT_CONTROL         (*((volatile uint32_t*)0xE0001000))
#define CM_DWT_CYCCNTENA_BIT   (1UL<<0)

#define CM_DWT_CYCCNT          (*((volatile uint32_t*)0xE0001004))

void start_cyccnt()
{
    CM_DEMCR |= CM_TRCENA_BIT;
    CM_DWT_CONTROL |= CM_DWT_CYCCNTENA_BIT; 
    CM_DWT_CYCCNT = 0;

}
void stop_cyccnt()
{
    CM_DWT_CONTROL &= ~CM_DWT_CYCCNTENA_BIT;
}

    You may find the below document useful if you've not seen it before

    https://developer.arm.com/documentation/arm051-799564642-251/latest

    Regards, Ronan

  • 0 in reply to Ronan Synnott

    Hi Ronan,


    It seems that I do not have write access to these memory addresses.
    I changed the values manually during debugging and the counter has started counting.

    Can I somehow unblock write access to memory at these addresses?

    Thanks!

  • 0 Arm Employee Badge in reply to Yevgenyy

    My apologies - I copied an incorrect version, try this:

    #define CM_DEMCR               (*((volatile uint32_t*)0xE000EDFC))
#define CM_TRCENA_BIT          (1UL<<24)

#define CM_DWT_LAR             (*((volatile uint32_t*)0xE0001FB0))

#define CM_DWT_CONTROL         (*((volatile uint32_t*)0xE0001000))
#define CM_DWT_CYCCNTENA_BIT   (1UL<<0)

#define CM_DWT_CYCCNT          (*((volatile uint32_t*)0xE0001004))

void start_cyccnt()
{
    CM_DEMCR |= CM_TRCENA_BIT;
    CM_DWT_LAR = 0xC5ACCE55;
    CM_DWT_CONTROL |= CM_DWT_CYCCNTENA_BIT; 
    CM_DWT_CYCCNT = 0;

}
void stop_cyccnt()
{
    CM_DWT_CONTROL &= ~CM_DWT_CYCCNTENA_BIT;
}

    I tested the attached with Arm Development Studio 2021.1, and it works well.

    this is a function that does something
Function took 3131 cycles

    m55_cyclecount.zip