Flash Patching in Cortex M7


After a suggestion, I am reposting this thread from the M7 Forum - 

I have an SOC design with a CM7 microcontroller whose AXI is connected to Code Flash and whose AHBP is connected to an AHB interconnect where there is a RAM as peripheral. The CM7 also has D-TCM connected to it.

I am trying to understand how to implement the functionality to remap code literals from Code Flash to RAM, as this is a use case for us. As I understand from ARMv7 Architecture Reference Manual, this is possible in the FPB unit (FP_REMAP) but when i look into the Cortex M7 manuals, this functionality of FPB is not implemented.

  • How exactly could such a remapping be performed?
  • Which RAM could be used for this purpose? - Could it be the RAM on AHB peripheral or the D-TCM?  Could it also be a Trace buffer (CoreSight component)? 
  • Where should the remapping logic be implemented? At the core of CM7 or at the bus interconnect?

Any suggestions would be helpful.

Thanks and Regards,