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Arm CPU subsystem development process

Hi

I need some help/pointers regarding Arm based CPU subsystem design.

Our team works on Arm based CPU subsystem design. It includes integrating Arm CPU cores, building AXI/AHB bus interconnects, building memory controllers for various on-chip memories, DMA controllers, Cache etc. We are trying to understand development approaches that different teams in industry follow while building such subsystems. Is there any forum either here or outside of Arm community that discusses these matters in the interest of leaning and improving development approach?

For example: We would like to understand how different teams design subsystems required for various product families (Automotive, Consumer/IoT etc.). Do you make single subsystem with lot of design time configuration options to cater to different product needs or do you make a CPU subsystem for every product? Or How is the debug system built for multicore subsystem and how is it verified pre-silicon etc.?

Please point to a right forum if you know.

Thanks

Kishor

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