1)the APB uses massive memory-I/O accesses.what is that massive memory-I/O accesses?
Can you explain where you saw "massive memory I/O accesses" described so we can have some context for your question?
The phrase doesn't appear in the APB protocol document as far as I can see, and I would suggest the opposite is true, that APB is NOT suitable for memory type accesses as it has limited support for narrow transfers (i.e. no SIZE signal), and as each access must take a minimum of 2 PCLK cycles it isn't exactly good for performance.
actually I am try to finding difference between AHB and APB.I sea one link http://www.differencebetween.net/technology/difference-between-ahb-and-apb/
in above link they mentioned When talking of the difference between the two, the AHB uses a full duplex parallel communication whereas the APB uses massive memory-I/O accesses.Read more: Difference Between AHB and APB | Difference Between http://www.differencebetween.net/technology/difference-between-ahb-and-apb/#ixzz6KvCNloI9
please give clarification above that point.
Personally I would ignore that article as it makes little sense. I have absolutely no idea what the author means with the text you are questioning, so as it isn't anything produced by ARM you would really need at ask the author what they meant.
All the article really tells me is what the letters AHB and APB stand for, that AHB is pipelined and APB is not, that AHB is higher performance and supports more complex slaves like memories and APB is a lot simpler and is designed for simple lower bandwidth peripherals... all of which you'd get from reading the AHB and APB spec introductions, so not sure what the article is really trying to achieve.
If I put "massive memory-I/O" into google, it suggests "Memory-Mapped IO"
But, as Colin Campbell says, you'd really have to ask the author of that article what he meant by it.
This shows the importance of giving a link so that we can see context!