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FIXED WRITE transfer of AWLEN=8'd4 in AXI4

what all possible scenarios from the slave side if each transfer initiated in a consecutive cycle by the master?

  • I'm not sure what you are asking here.

    A FIXED burst type would be used to access something like a FIFO, so no address incrementing for the burst.

    Transfers in consecutive cycles will simply keep accessing the same address, and if the target slave cannot perform the transfers being requested that quickly, it can use the WREADY or RVALID handshake controls to stall data transfers.