AXI4 document says that when a master issues multiple transactions to same / overlapping address with same ID, the order of arrival at the slave must be the same as the order of issue.
I think it means if transactions are not for the same address, they can be out of order even if they have same ID.
Is it correct?
If so, when transactions have the same ID how can I distinguish whether transactions are reorderable or not?
Is this quote from section A6.2 of the AXI4 protocol ?
if so, this is for "normal" memory types where the system behaviour isn't affected by the order of transactions reaching the slave when they do NOT overlap, but where they do overlap you need to ensure that the last issued transfer is the one that is last updated, so that the memory slave is left in the master's intended state.
For "device" memory types, ordering of ALL transfers is important, overlapping or not, as this could affect the programming steps of a device.
Overlapping describes two transfers to the same slave that have the same one or more bytes included in the transfer. These overlapping transfers MUST be to the same slave.
Now I understand what it means.
But I think multiple transactions with SAME ID will always arrive at the target in the same order of issue.
If not, slave may not be able to respond in order.
So, order of arrival may be same no matter what the memory type of the target is.
Is there any reason to distinguish the case for the Device memory and the others?