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the usage of WSTRB signal

Dong Luo
Note: This was originally posted on 26th February 2009 at http://forums.arm.com

Hi All,
I was going through the AMBA AXI specs, but I have some questions about the usage of the WSTRB signal. In the middle of a burst, can some bits of WSTRB be low? Again, in the last transfer of a burst, can some bits of WSTRB be low? For example, assuming the data bus is 32-bit wide and in the middle of a burst, can I transfer data 0x11xx22xx(x means don't care) and set  WSTRB to be 0b1010 ? Thanks in advance.
  • 0
    Note: This was originally posted on 3rd March 2009 at http://forums.arm.com

    Hi JD,
    I'm sorry. I forgot that AWSIZE can not be changed in a burst. Your explanation is what I want and I understand the usage of AWSIZE and WSTRB thoroughly. Thank you very much.
  • 0
    Note: This was originally posted on 2nd March 2009 at http://forums.arm.com

    Hi JD,
    Sorry. I think I didn't describe my questions clearly. So I will describe my questions in more detail this time.
    Question 1:
    assuming the address bus and data bus are 32-bit wide. In the first transfer of a burst, I want to write 4 byte data to the address of 0x00000000 and of course, AWSIZE is 3'b010 and WSTRB is 4'b1111. In the second transfer, I want to write 1 byte data to the address of 0x00000005 and 1 byte data to the address of 0x00000007. Can I set AWSIZE to be 3'b010 and set WSTRB to be 4'b1010? In the third transfer, I want to write 4 byte data to the address of 0x00000008 and of course, AWSIZE is 3'b010 and WSTRB is 4'b1111. If I can do the second transfer in my way, will the slave's address register be added by 4 to prepare for receiving the next transfer's data?


    Question 2:
    assuming the address bus and data bus are 32-bit wide. In the first transfer of a burst, I want to write 2 byte data to the address of 0x00000000 and of course, AWSIZE is 3'b001 and WSTRB is 4'b0011. Will the slave's address register be added by 2 to prepare for receiving the next transfer's data?


    Question 3:
    assuming the address bus and data bus are 32-bit wide. In the first transfer of a burst, I want to write 1 byte data to the address of 0x00000001 and 1 byte data to the address of 0x00000003. Can I set AWSIZE to be 3'b001 and WSTRB to be 4'b1010? Will the slave's address register be added by 4 to prepare for receiving the next transfer's data?


    Would you please take some time to explain the three questions for me? Thanks in advance.
  • 0
    Note: This was originally posted on 2nd March 2009 at http://forums.arm.com

    Hi JD,
    Sorry. I think I didn't describe my questions clearly. So I will describe my questions in more detail this time.


    Looking at your questions this time, I did actually understand the same problems from the first posting.

    Question 1:
    assuming the address bus and data bus are 32-bit wide. In the first transfer of a burst, I want to write 4 byte data to the address of 0x00000000 and of course, AWSIZE is 3'b010 and WSTRB is 4'b1111. In the second transfer, I want to write 1 byte data to the address of 0x00000005 and 1 byte data to the address of 0x00000007. Can I set AWSIZE to be 3'b010 and set WSTRB to be 4'b1010?


    AWSIZE is only transferred at the start of the burst, so it will be valid for all transfers in the burst (you cannot change it for each transfer).

    In the second transfer in this burst, yes you can drive WSTRB=4'b1010 to only signal the bytes to 0x7 and 0x5 as valid.

    In the third transfer, I want to write 4 byte data to the address of 0x00000008 and of course, AWSIZE is 3'b010 and WSTRB is 4'b1111. If I can do the second transfer in my way, will the slave's address register be added by 4 to prepare for receiving the next transfer's data?


    Yes, because AWSIZE does not change between transfers in a burst.

    Every WVALID indication in this burst tells the slave that it should increment the local address by the original AWSIZE value, so by 4 bytes in this example.

    The fact that WSTRB only indicated 2 bytes as valid in the second transfer is not relevant, the local address still increments by 4 bytes.

    Question 2:
    assuming the address bus and data bus are 32-bit wide. In the first transfer of a burst, I want to write 2 byte data to the address of 0x00000000 and of course, AWSIZE is 3'b001 and WSTRB is 4'b0011. Will the slave's address register be added by 2 to prepare for receiving the next transfer's data?


    Only if the burst type AWBURST is signalling INCR or WRAP. If the burst is FIXED type, the address would not increment.

    But assuming you were looking at INCR bursts, yes, in this example the address would increment by 2 bytes (because AWSIZE was 3'b001).

    Question 3:
    assuming the address bus and data bus are 32-bit wide. In the first transfer of a burst, I want to write 1 byte data to the address of 0x00000001 and 1 byte data to the address of 0x00000003. Can I set AWSIZE to be 3'b001 and WSTRB to be 4'b1010?


    No. If you are transferring data to both 0x1 and 0x3 in this transfer, AWSIZE must indicate at least a word wide transfer (3'b010).

    Will the slave's address register be added by 4 to prepare for receiving the next transfer's data?


    Unfortunately I cannot say here because your AWSIZE value was wrong for the first part of this question.

    If AWSIZE was correctly driven to 3'b010 for the first transfer, then yes, the local address would increment by 4.

    Hope that gives you a more detailed response.

    JD
  • 0
    Note: This was originally posted on 27th February 2009 at http://forums.arm.com

    Hi 0254081,

    > I was going through the AMBA AXI specs, but I have some questions
    > about the usage of the WSTRB signal. In the middle of a burst, can
    > some bits of WSTRB be low?

    Yes.

    > Again, in the last transfer of a burst, can some bits of WSTRB be low?

    Yes.

    > For example, assuming the data bus is 32-bit wide and in the middle
    > of a burst, can I transfer data 0x11xx22xx(x means don't care) and set 
    > WSTRB to be 0b1010 ?

    That depends on the value of AWSIZE.

    If AWSIZE is 3'b010, then yes, WSTRB could be 4'b1010.

    However if you were doing 16 bit transfers on a 32 bit wide burst, you could only assert WSTRB bits that apply to the half of the bus currently being used.

    JD