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AHB Multilayer

Jesuraj vinoth Joseph
Note: This was originally posted on 30th April 2008 at http://forums.arm.com

In the multilayer environment,  i found a interconnect matrix with interface signals on the Master side having a hsel signal. Can anyone specify the significance of it. A basic doubt is that apart from the interconnect matrix do we hav any slave mux and decoder.
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    Note: This was originally posted on 2nd May 2008 at http://forums.arm.com

    Hi Ark,

    Is the HSEL line an input or output ?

    If it's an input then that port on the interconnect is a standard AHB slave for the master to drive, meaning you can have other local AHB slaves connected directly to this master bus.

    This would then require external decoder and MUX components, or else you could just tie the HSEL line high so that this interconnect  slave port is permanently selected for this master, so no decoder or MUX required.

    If the HSEL line is an output, it would suggest the port on the interconnect is a post-decoder port designed to directly connect to a single external slave, so not needing a decoder or MUX (unless you then wanted to split this single HSEL output to support a number of slaves)..

    Where did the interconnect design come from ?

    If it is something you have licensed then I'd hope that it came with some documentation, and if it was designed inside your company then you would probably be best asking internally for details.

    JD
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    Note: This was originally posted on 2nd May 2008 at http://forums.arm.com

    Hi Ark,

    Is the HSEL line an input or output ?

    If it's an input then that port on the interconnect is a standard AHB slave for the master to drive, meaning you can have other local AHB slaves connected directly to this master bus.

    This would then require external decoder and MUX components, or else you could just tie the HSEL line high so that this interconnect  slave port is permanently selected for this master, so no decoder or MUX required.

    If the HSEL line is an output, it would suggest the port on the interconnect is a post-decoder port designed to directly connect to a single external slave, so not needing a decoder or MUX (unless you then wanted to split this single HSEL output to support a number of slaves)..

    Where did the interconnect design come from ?

    If it is something you have licensed then I'd hope that it came with some documentation, and if it was designed inside your company then you would probably be best asking internally for details.

    JD
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