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SoC Design and Simulation forum AHB Multilayer

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AHB Multilayer

Jesuraj vinoth Joseph over 12 years ago

Note: This was originally posted on 30th April 2008 at http://forums.arm.com

In the multilayer environment, i found a interconnect matrix with interface signals on the Master side having a hsel signal. Can anyone specify the significance of it. A basic doubt is that apart from the interconnect matrix do we hav any slave mux and decoder.