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How to go from 32-bit to 64-bit AHB data bus

Note: This was originally posted on 21st November 2007 at http://forums.arm.com

Hi,
I have to write a C program for an ARM processor that has a 64-bit data bus (ARM11, Cortex-R4) and to perform some simulations afterward (Verilog). So far I have only worked with processors that had 32-bit wide AHB data bus (ARM9).  I am not completely clear what changes for me here when I am doing the transition from 32-bits to 64-bits data buses? What are the main considerations I have to take into account regarding this matter? Will my program written for ARM966 compile for ARM11 and what the global changes in the ELF file will be? I assume the ARM instructions and address bus are 32-bit wide (and there is no ARM processor yet with a 32-bit wide address bus). I plan to put the ELF file into 64-bit wide Verilog memory for the simulation - does everything have to be 8 bytes aligned in that case?
Please give me some comments regarding these issues.
Thank you very much,
Tamo
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  • Note: This was originally posted on 26th November 2007 at http://forums.arm.com

    > Can't I just create 64-bit program image using 'fromelf' and read it directly into a 64-bit memory block

    From the software point of view, nothing changes - there is no special "64-bit" image.  The binaries for an ARM with a 32-bit bus port will be identical to an an ARM with a 64-bit bus port. The 64-bit interface size only specifies the width of the data port (how many bits of data the core can load in one go - in this case two 32-bit words).

    Do not confuse this with the x86 notion of 64-bit - it's completely different! The ARM core is still a 32-bit / 16-bit instruction set (depending on whether you are ARM or THUMB), the register sizes are still 32-bit, and the addressing is still 32-bit. The only thing that changes is width of the data lane on the bus - so for a single 32-bit base address the bus transfers 2x32-bit data words to the core.

    The 64-bit data path out of the core is 64-bit aligned, which is why Joseph indicated that the speed of transfer can be alignment sensitive (a DWORD load split across a 64-bit address alignment boundary requires two external BUS transfers from the core).
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  • Note: This was originally posted on 26th November 2007 at http://forums.arm.com

    > Can't I just create 64-bit program image using 'fromelf' and read it directly into a 64-bit memory block

    From the software point of view, nothing changes - there is no special "64-bit" image.  The binaries for an ARM with a 32-bit bus port will be identical to an an ARM with a 64-bit bus port. The 64-bit interface size only specifies the width of the data port (how many bits of data the core can load in one go - in this case two 32-bit words).

    Do not confuse this with the x86 notion of 64-bit - it's completely different! The ARM core is still a 32-bit / 16-bit instruction set (depending on whether you are ARM or THUMB), the register sizes are still 32-bit, and the addressing is still 32-bit. The only thing that changes is width of the data lane on the bus - so for a single 32-bit base address the bus transfers 2x32-bit data words to the core.

    The 64-bit data path out of the core is 64-bit aligned, which is why Joseph indicated that the speed of transfer can be alignment sensitive (a DWORD load split across a 64-bit address alignment boundary requires two external BUS transfers from the core).
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