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How to go from 32-bit to 64-bit AHB data bus
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How to go from 32-bit to 64-bit AHB data bus
tamo tamo
over 12 years ago
Note: This was originally posted on 21st November 2007 at
http://forums.arm.com
Hi,
I have to write a C program for an ARM processor that has a 64-bit data bus (ARM11, Cortex-R4) and to perform some simulations afterward (Verilog). So far I have only worked with processors that had 32-bit wide AHB data bus (ARM9). I am not completely clear what changes for me here when I am doing the transition from 32-bits to 64-bits data buses? What are the main considerations I have to take into account regarding this matter? Will my program written for ARM966 compile for ARM11 and what the global changes in the ELF file will be? I assume the ARM instructions and address bus are 32-bit wide (and there is no ARM processor yet with a 32-bit wide address bus). I plan to put the ELF file into 64-bit wide Verilog memory for the simulation - does everything have to be 8 bytes aligned in that case?
Please give me some comments regarding these issues.
Thank you very much,
Tamo
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tamo tamo
over 12 years ago
Note: This was originally posted on 26th November 2007 at
http://forums.arm.com
Thank you for the explanations and info, I appreciate the help.
I am sorry I did not answer earlier - it was a much needed Thanksgiving break.
Would you please clarify the part about combining 32-bit words for the 64-bit access?
Can't I just create 64-bit program image using 'fromelf' and read it directly into a 64-bit memory block(assuming that I have a 64-bit AHB memory controller)?
I must say I am still not clear about the 64-bit instruction access vs. 32-bit instructions, I definitely need to take some 64-bit AHB ref. design and see what happens.
If I don't have 64-bit AHB controller:
As I understand your explanation, if I have a 32-bit memory, I need to add one more block into my 32-bit AHB controller. That block would do the two 32-bit memory reads, combine them into one 64-bit word and then return that to the processor. I guess the ARM then sends the instr. addresses in steps of 8?
Would you maybe give me a few more words on this subject?
Thank you.
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tamo tamo
over 12 years ago
Note: This was originally posted on 26th November 2007 at
http://forums.arm.com
Thank you for the explanations and info, I appreciate the help.
I am sorry I did not answer earlier - it was a much needed Thanksgiving break.
Would you please clarify the part about combining 32-bit words for the 64-bit access?
Can't I just create 64-bit program image using 'fromelf' and read it directly into a 64-bit memory block(assuming that I have a 64-bit AHB memory controller)?
I must say I am still not clear about the 64-bit instruction access vs. 32-bit instructions, I definitely need to take some 64-bit AHB ref. design and see what happens.
If I don't have 64-bit AHB controller:
As I understand your explanation, if I have a 32-bit memory, I need to add one more block into my 32-bit AHB controller. That block would do the two 32-bit memory reads, combine them into one 64-bit word and then return that to the processor. I guess the ARM then sends the instr. addresses in steps of 8?
Would you maybe give me a few more words on this subject?
Thank you.
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