Uv3 Parallel Port 0 crossbar display disagrees with the Silabs data sheet Rev 1.0.7 for the 48-pin package. With UART0 enabled, Uv3 shows SDA and SCL mapped to PO.0 and P0.1 respectively. With UART0 enabled, the doc Fig 17.3 shows SDA and SCL mapped to P0.0 and P0.3 respectively, with Tx and Rx at P0.1 and P0.2 respectively. Who you gonna believe? (The way my system is behaving right now, I don't believe either one!)