I have written the NMI handler for the LPC1768 MCU based target board as below and I am using Keil MDK Lite v4.5. The CPU control enters the NMI handler when invoked by a logic High signal injected to P2.10 but, the issue is upon exit the CPU control loops in the HardFault_Handler implemented in the startup_LPC17xx.s file. Stack memory is set for 100 bytes. Also,is it possible to simulate NMI implementation in Keil MDK v4.5, i have tried it but no success.
void NMI_Handler (void){ LPC_GPIO1->FIOPIN |= (1<<29); delay(); LPC_GPIO1->FIOPIN &= ~(1<<29); } int main (){ //Configuring GPIO P1.29 as Output to which an LED is interfaced LPC_PINCON->PINSEL3 &= ~((1<<27)|(1<<26)); LPC_GPIO1->FIODIR |= (1<<29); LPC_GPIO1->FIOPIN &= ~(1<<29); //Configuring P2.10 as NMI pin LPC_PINCON->PINSEL4 &= ~(1<<20); LPC_PINCON->PINSEL4 |= (1<<21); //Enable NMI NVIC_EnableIRQ(NonMaskableInt_IRQn); while(1); }
No, I'm pretty sure it saves context. This is a Cortex-M3. The LR will contain a magic value, and context in registers used by C stacked. LR would only need preserving further if you called some other subroutines, which doesn't seem to be the case.
What would be illustrative is what the processor indicates the faulting condition is when it enters the Hard Fault Handler. The registers, stack, and instruction it faulted on. This will be significantly more enlightening than spinning in a while(1); wondering what happened.