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Logic Analyzer is not updating my variables

Hi all!

I bought Segger J-Link JTAG and I wanted to make a try with Logic Analyzer.
I have unlocked debug state of my STM32F107 as described in Keil Help, made a simple while loop with incrementation like shown below:
lh4.ggpht.com/.../trace1.jpg

and after I have run my program for several seconds, stopped it and I found I didnt record any result. I start and stop for several times, and that are the only positions Logic Analyzer recorded:
lh4.ggpht.com/.../trace2.jpg

As you can see my trace have NOT been overflowed, and my debug settings looks like this:
lh4.ggpht.com/.../trace3.jpg

even if I set more trace ports it is always the same :(

Parents
  • Hi there,

    meanwhile i have a full licence and checked again the Logic Analyzer.

    I can say, YES it works, BUT the values are only updated if i enable the "Periodic Window Update". And the really poor behavior is, the values in the Logic Analyzer are only the sampled values of the "Periodic Window Update". So in the end the resolution depends on the sample time of the "Periodic Window Update". This is not acceptable in a real time application.

    I know, that the SWO Trace is no full trace, but ITM Macros (printf) works fine and is sufficient, but why is that not possible with the Logic Analyzer?

    If someone will change a ULink2 Adapter to my JLink, he can mail me. After some mails to segger with no response, i don't believe that there will be a solution in the next time... really sad..

    Best regards

    Holger

Reply
  • Hi there,

    meanwhile i have a full licence and checked again the Logic Analyzer.

    I can say, YES it works, BUT the values are only updated if i enable the "Periodic Window Update". And the really poor behavior is, the values in the Logic Analyzer are only the sampled values of the "Periodic Window Update". So in the end the resolution depends on the sample time of the "Periodic Window Update". This is not acceptable in a real time application.

    I know, that the SWO Trace is no full trace, but ITM Macros (printf) works fine and is sufficient, but why is that not possible with the Logic Analyzer?

    If someone will change a ULink2 Adapter to my JLink, he can mail me. After some mails to segger with no response, i don't believe that there will be a solution in the next time... really sad..

    Best regards

    Holger

Children