GNU Make + C166

I think you mean makedepend.exe.
Another option: The RealView compiler has an option to generate dependency lists - try your compiler manual.

I've made our build environment, based on the Keil C166 toolchain in combi with GNU make.

Added dependency checking myself. Great source of info was the page of the maintainer of GNU make: http://make.paulandlesley.org/

especially the page about automatic dependency generation: make.paulandlesley.org/autodep.html

The C166 compiler does not have any option for dependency info but together with the info mentioned above, the C166 pre-processor output and some Unix-like tools for Win32 (grep, sed, sort, tr), I created a batch file (no *nix builds unfortunately) that generates the dependencies for me (*.d files, that are included into the makefile). Works great!

The C166 compiler can produce preprocessor output (*.i files) with the PREPRINT(...) directive: http://www.keil.com/support/man/docs/c166/c166_preprint.htm http://www.keil.com/support/man/docs/c166/c166_cm_ifile.htm

The .i file contains lines like ' #line "filename.h" '. If you search/combine all these lines, you can find all the dependencies of the .c file.

I could check with my boss if it's OK to give you more info.

Good luck,
Joost

Here's a link to some Unix utilities for Win32, no longer maintained but works fine on Win XP, also includes makedepend.exe mentioned earlier: unxutils.sourceforge.net/

I chose to use the Keil C166 compiler/preprocessor itself, because it really knows how to parse a C166 specific .c file.
Will have a look again at makedepend.exe .

--
Joost

makedepend is also part of Cygwin, and contains a man page. man pages are also online everywhere.

Make sure to use the same #define's, includes, etc. as when building the actual application. I simpy use the exact same compile command in GNU make and produce the pre-processor output on the fly.

Thank you!

You really help me to understand this problem!

For the present I have not enough skill with "make" utility, therefore I'll try to write "full rebuild" makefile :)

Another question:
This is my first Makefile (not perfect :)).
But I have following trouble: I can't get .OBJ file at first run of make... At first run I get .ic (rule with EC166) file and error with C166 rule, but if I start make second time the .OBJ file generates without errors.
What I do incorrectly?

inc_dir           := INCDIR\(.\INC\;.\inc\uc_GUI\)
lst_dir           := PRINT\(.\lst\MAIN.lst)
EC_compile_flags  := MODV2 HCOMPACT
C_compile_flags   := MODV2 HCOMPACT BROWSE UNSIGNED_CHAR $(inc_dir) MODV2 DEBUG

source_files_cpp  := main.cpp
source_files_c    := main.c

object_files_cpp  := $(source_files_cpp:.cpp=.ic)
object_files_c    := $(source_files_cpp:.c=.OBJ)


main.OBJ: $(object_files_cpp)
        C166 $^ $(C_compile_flags)

$(object_files_cpp): $(source_files_cpp)
        EC166 $^ $(EC_compile_flags) $(inc_dir)


build: main.obj

rebuild: clean build

clean:
        rm *.ic *.OBJ

all:
        @echo $(object_files)

.PHONY: clean build rebuild

I've repair my last problem by adding "-" before C166/EC166.
-C166
-EC166
But I don't understand, C166/EC166 don't return 0?

That's exactly what I did. Have a normal makefile first and then add dependency checking.

I dont have any experience with the EC166 (pre?)compiler. Keil doesn't have an EC166 manual online (anymore?). Does EC166 generate a .o (object) or .c (source) file? The .ic files in your example.

I use the following file extensions:
.abs -> the final executable/application/image generated by the linker, see
http://www.keil.com/support/man/docs/l166/l166_intro.htm
.o -> compiled .c file
.c -> C source file
.a66 -> assembly file
.dep -> dependency file
.i -> preprocessor output
.lst -> list file
.m66 -> map file

Don't have alot of time but I'll have a look at your makefile later on. If somebody else hasn't done so already.

Don't you need a link-step (L66) in your build? Combining the .o files to the final application?

It's useful to draw a tree-like diagram of the build.

            APP.abs
               ^
        L166 <.o files>
        [ object files ]
           ^        ^
C166 <.c files>    EC166 <.cpp files> ??
     ^
[ .ic files ? ]
or EC166 <.cpp files> here??

The .ABS file can then be converted to .HEX (Intel Hex), .BIN or .S (Motorola S-Record) if needed.

--
Joost

GNU make is case-sensitive so be careful with .OBJ, .obj, etc!
Unless you have a special case-insensitive build of GNU make, see GNU make build instructions and Win32 specifics.

--
J

I've repair my last problem by adding "-" before C166/EC166.
-C166
-EC166
But I don't understand, C166/EC166 don't return 0?

They should! Check their output for any errors/warnings. Simply adding a '-' (ignore non-zero exit codes) is dangerous and I wouldn't recommend it, especially for the compile/link/assemble commands.

--
J

At first run I get .ic (rule with EC166) file and error with C166 rule

If you shows us the error(s) (copy/paste), we might be able to figure out what's happening.

--
J

They should! Check their output for any errors/warnings.

Yes, my compilers prints the some warnings...
Should I supress this action?

My output... (first run after clean)

G:\##\Projects\Infineon XC167\ip++3>echo VSLICKERRORPATH="G:\##\Projects\Infineon XC167\ip++3"
VSLICKERRORPATH="G:\##\Projects\Infineon XC167\ip++3"

G:\##\Projects\Infineon XC167\ip++3>make.bat
EC166 main.cpp MODV2 HCOMPACT INCDIR\(.\INC\;.\inc\uc_GUI\)

EC166 EC++ COMPILER V1.09b
COPYRIGHT KEIL ELEKTRONIK GmbH 2000 - 2006

EC166 COMPILATION COMPLETE.  3 WARNING(S),  0 ERROR(S)
"MAIN.CPP", line 177: warning: variable "angle" was declared but never referenced

                  ^

"MAIN.CPP", line 181: warning: variable "V_Rect" was declared but never referenced

                  ^

"MAIN.CPP", line 185: warning: variable "VEL" was declared but never referenced

                        ^

make: *** [main.ic] Error 1

The next question:

Do you use the Keil approach to make ".i, .ii, ..." file and use then like...
C166 @filename

I want to make linker control file because there are many information in linker control string (CLASSES...)
How can I make a dynamic control file for linker from "make"? (Windows)

P.S. EC++ is precompiler. it generates .ic files which contains auto generated C-code for further c-compilation.

Also check:

make -d
make --debug=...
make -p or make -qp

Check GNU make manual.

I've also added this to remove any existing GNU make defaults:

# -----------------------------------------------------
# CLEAR DEFAULT RULE
# -----------------------------------------------------
.DEFAULT :


# -----------------------------------------------------
# CLEAR SUFFIXES
# -----------------------------------------------------

.SUFFIXES :

Quick hints (no time):
- Link all objects to the final app.abs.
- use a pattern rule to compile .c's or .ic's to .o's (see manual), example:
%.o : *.c c166 etc.

%.o : *.ic [ if I understand EC166 correctly ] c166 etc.

- use a pattern rule to (pre)compile .cpp's to .ic's
%.ic : %.cpp ec166 etc.

Also, make sure to use tabs in front of the commands. It's a bit "quircky" maybe but that's how GNU make works, but a common mistake to make.

Yes, my compilers prints the some warnings...
Should I supress this action?

No, you should fix the warnings :-)

Compile (CHECK TABS!):

$(OUTPUTDIR)/%.o : $(SOURCEDIR/%.c
  $(ECHO) "Compiling  $< to"
  $(ECHO) "           $@"

  $(ECHO) "$(call CONVERTPATH,$<)"                     > $(CMD_FILE)
  $(ECHO) "OBJECT($(call CONVERTPATH,$@))"            >> $(CMD_FILE)
  $(ECHO) "PREPRINT($(call CONVERTPATH,$(@:.o=.i)))"  >> $(CMD_FILE)
  $(ECHO) "PRINT($(call CONVERTPATH,$(@:.o=.lst)))"   >> $(CMD_FILE)
  $(ECHO) "$(CCINCLUDES)"                             >> $(CMD_FILE)
  $(ECHO) "$(CCFLAGS)"                                >> $(CMD_FILE)
  $(ECHO) "$(CCDEFINES)"                              >> $(CMD_FILE)

  $(CC) @$(CMD_FILE) $(CCLOGFILE)

  $(ECHO) "Generating dependencies for $<..."

  $(MAKEDEPEND) $(call CONVERTPATH,$(@:.o=.i)) $@ > $(@:.o=.dep)

Link (CHECK TABS):

$(OUTPUTDIR)/APP.abs : $(OBJECTS) $(LINKERFILE)

  $(ECHO) "Linking the following files to $@"
  $(QUIET)FOR %%f in ( $(OBJECTS) ) DO $(ECHO) "           %%f"

  $(ECHO) "$(call CONVERT_L166OBJECTS,$(OBJECTS))"      > $(CMD_FILE)
  $(ECHO) "TO $(call CONVERTPATH,$@)"                  >> $(CMD_FILE)
  $(ECHO) "$(LDFLAGS)"                                 >> $(CMD_FILE)

  $(CP) $(call CONVERTPATH,$(CMD_FILE)) + $(call CONVERTPATH,$(LINKERFILE)) $(call CONVERTPATH,$(CMD_FILE)) >NUL

  $(LD) @$(CMD_FILE) $(LDLOGFILE)

xxLOGFILE = "> cc.log" or "> ld.log" or something (optional)
CONVERPATH does \ to /
LINKERFILE = fixed part of linker command file (memory map, etc.)

The use of command files, depends on the shell you're using (CMD.exe, CygWin, etc.) and older Keil tools didn't handle long command lines very well. Maybe it's currently possible to do without the command files and @<file>, not sure.

--
J