Good day!
Can I get from C166/EC166 compilers information about all nested includes such as -M, -MM, -MD, -MMD keys for GCC compiler?
If not, I can only use make for rebuild target?
They should! Check their output for any errors/warnings.
Yes, my compilers prints the some warnings... Should I supress this action?
My output... (first run after clean)
G:\##\Projects\Infineon XC167\ip++3>echo VSLICKERRORPATH="G:\##\Projects\Infineon XC167\ip++3" VSLICKERRORPATH="G:\##\Projects\Infineon XC167\ip++3" G:\##\Projects\Infineon XC167\ip++3>make.bat EC166 main.cpp MODV2 HCOMPACT INCDIR\(.\INC\;.\inc\uc_GUI\) EC166 EC++ COMPILER V1.09b COPYRIGHT KEIL ELEKTRONIK GmbH 2000 - 2006 EC166 COMPILATION COMPLETE. 3 WARNING(S), 0 ERROR(S) "MAIN.CPP", line 177: warning: variable "angle" was declared but never referenced ^ "MAIN.CPP", line 181: warning: variable "V_Rect" was declared but never referenced ^ "MAIN.CPP", line 185: warning: variable "VEL" was declared but never referenced ^ make: *** [main.ic] Error 1
The next question:
Do you use the Keil approach to make ".i, .ii, ..." file and use then like... C166 @filename
I want to make linker control file because there are many information in linker control string (CLASSES...) How can I make a dynamic control file for linker from "make"? (Windows)
P.S. EC++ is precompiler. it generates .ic files which contains auto generated C-code for further c-compilation.
No, you should fix the warnings :-)
Compile (CHECK TABS!):
$(OUTPUTDIR)/%.o : $(SOURCEDIR/%.c $(ECHO) "Compiling $< to" $(ECHO) " $@" $(ECHO) "$(call CONVERTPATH,$<)" > $(CMD_FILE) $(ECHO) "OBJECT($(call CONVERTPATH,$@))" >> $(CMD_FILE) $(ECHO) "PREPRINT($(call CONVERTPATH,$(@:.o=.i)))" >> $(CMD_FILE) $(ECHO) "PRINT($(call CONVERTPATH,$(@:.o=.lst)))" >> $(CMD_FILE) $(ECHO) "$(CCINCLUDES)" >> $(CMD_FILE) $(ECHO) "$(CCFLAGS)" >> $(CMD_FILE) $(ECHO) "$(CCDEFINES)" >> $(CMD_FILE) $(CC) @$(CMD_FILE) $(CCLOGFILE) $(ECHO) "Generating dependencies for $<..." $(MAKEDEPEND) $(call CONVERTPATH,$(@:.o=.i)) $@ > $(@:.o=.dep)
Link (CHECK TABS):
$(OUTPUTDIR)/APP.abs : $(OBJECTS) $(LINKERFILE) $(ECHO) "Linking the following files to $@" $(QUIET)FOR %%f in ( $(OBJECTS) ) DO $(ECHO) " %%f" $(ECHO) "$(call CONVERT_L166OBJECTS,$(OBJECTS))" > $(CMD_FILE) $(ECHO) "TO $(call CONVERTPATH,$@)" >> $(CMD_FILE) $(ECHO) "$(LDFLAGS)" >> $(CMD_FILE) $(CP) $(call CONVERTPATH,$(CMD_FILE)) + $(call CONVERTPATH,$(LINKERFILE)) $(call CONVERTPATH,$(CMD_FILE)) >NUL $(LD) @$(CMD_FILE) $(LDLOGFILE)
xxLOGFILE = "> cc.log" or "> ld.log" or something (optional) CONVERPATH does \ to / LINKERFILE = fixed part of linker command file (memory map, etc.)
The use of command files, depends on the shell you're using (CMD.exe, CygWin, etc.) and older Keil tools didn't handle long command lines very well. Maybe it's currently possible to do without the command files and @<file>, not sure.
-- J
Correction: CONVERPATH does \ to / should be / to \ I use / everywhere in GNU make.
Older Keil tools and some Win32 commands, didn't handle backslashes very well (??). Not the most beautiful solution, I agree, but it worked.
Older Keil tools and some Win32 commands, didn't handle backslashes very well (??).
-> forward slashes *sigh* :-)