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how to create new DF algorithm

Hi,

could someone give me some advice to build another dataflash algorithm to download code via jtag to the dataflash connected at the spi interface (for the AT91RM9200 controller).

I just take a look into the AT91SAM9_DF_P1056_CS0 file, but I don't know where I can get the "Run User Programs After Build / Rebuild" (Options-for-target->User) flx-file.

And is it right, that I have to choose the internal RAM for the ROM definitions under options-for-target->Target, too?

best regards
Hans

  • Take a look to the manual:

    C:\Keil\ARM\HLP\GSA.CHM - Flash programming - Define Flash Algorithm.

    Not need a full licensed MDK to compile algorithms.

  • thanks for your answer.

    At the moment I've two problems with the communication between the dataflash and the processor AT91RM9200.

    Is it normal that I'm able to see the address (for the dataflash memory) at the address bus too? Whatever if I try to download some code to the dataflash or if I try to read some data from the dataflash...

    The other problem is, that I'm not able to start the programm... I can download the code to the dataflash and I also see the communication between the dataflash and the processor, when I try to start the programm...

    but then nothing happens... I'm not able to start the main application... Do you have some advice for me?

    best regards
    Hans

  • Is this data flash also on the Atmel reference board? Or with other words: can we replicate your problem using a standard Atmel board?

  • I'm using the AT45DB021B dataflash from atmel - I think it's the same dataflash family as for the Atmel reference board.

    I use the AT91SAM9_DF version (coming with the MDK version) to create my own dataflash file for this memory.

    FlashDev.c: I've only add the new algorithm for this dataflash. If I'm right, then the device start addr and the device size is programmable for the current uvision project.

    #ifdef P264_CS0                // Page Size 528 Bytes, Chip Select 0
    struct FlashDevice const FlashDevice  =  {
       FLASH_DRV_VERS,             // Driver Version, do not modify!
       "AT91RM9200 DataFlash Page264 CS0",   // Device Name
       EXTSPI,                     // Device Type
       0x00C00000,                 // Device Start Address
       0x00210000,                 // Device Size in Bytes (4.125MB)
       264,                        // Programming Page Size
       0,                          // Reserved, must be 0
       0xFF,                       // Initial Content of Erased Memory
       100,                        // Program Page Timeout 100 mSec
       100,                        // Erase Sector Timeout 100 mSec
    
    // Specify Size and Address of Sectors
       0x840, 0x000000,           // Sector Size 4224 bytes (block = 8*page)
       SECTOR_END
    };
    #endif
    

    flashos.h: I didn't change anything in this file.

    flashhw.h: I didn't change anything in this file.

    FlashPrg.c: I change a lot of registers (for this controller). Because they are not the same as for the AT91SAM controller.

    #define STACK_SIZE  128                 // Stack Size
    
    #define DF_OFFSET    0x0             // User Program offset in DataFlash
    #define SDRAM_START  0x00C00000         // Start of External SDRAM
    

    These are the only values where I'm not really sure if I made the right corrections. I don't know why the start address has the name SDRAM_START. I figured out that it should be the start address for the external memory (for the dataflash).

    I don't use an operating system - so I update the DF_OFFSET to 0x0..

    DFlashHW.c: I only change the base addr register for the SPI interface.

    I'm able to add the new memory in uvision. When I download some code then I can see the activity between the dataflash and the processor as well as at the address bus (not at the databus). I get the same behaviour when I try to read out the data from the dataflash memory.

    When you start the processor (with BMS pin at high level) then the processor is searching for a bootable image at the spi dataflash (for example) - I'm able to see the access from the processor and the short answer from the dataflash (only one amplitude). If I'm right, then the dataflash has to transmit at this time the whole image to the internal ram - and so the dataflash transmit only the message that there's no image stored whitin the dataflash.

    So I think that I'm not able to write anything to the dataflash, although I get no error message from the keil uvision. And moreover the WP# pin is also connected to 3.3 voltage to have no protection. So there should be no hardware connection error.

    best regards
    Hans

  • The internal boot program in AT91RM9200 supports booting from SPI Data Flash. Bootloader looks for a sequence of eight valid ARM exception vectors (B or LDR) except for the sixth vector which is actually used to store information about image size to be downloaded. If a valid sequence is found then code is downloaded to SRAM (remapped at address 0) and started.

    This enables only automatic start of small code (size limitation of internal SRAM) which is usually the second level boot loader. This custom written code usually allows download from different non volatile memories to SDRAM (with proper initialization).

    Therefore booting standard applications (bigger then internal SRAM) requires such a bootloader and a Flash programming algorithm which can write the bootlaoder and the application.

    Also the application must be built for the address from which it excepts to run (for example SDRAM).

    MDK already supports such features for AT91SAM9260/61/63 devices on the Atmel EK boards.

    Take a look into your MDK installation at Keil\ARM\Boards\Atmel\AT91SAM926x-EK (x=0,1,3). There you can see the second level bootloader and a simple application which can be downloaded to Data Flash and is bootable.

  • thanks for your answer. I just take a look at the blinky AT91SAM9260 example, which uses the spi dataflash. There's a version where the code is loaded into the internal RAM which is only 4k - the internal RAM from the AT91RM9200 is 16k...

    I started a new project which includes only a while(1) loop - nothing else. So I get the error "Insufficient RAM for flash Algorithm!" . But how should such a really small example work with the SAM9260 (with only 4k internal RAM)???

    And the scatter-file is nearly the same one

    ; *************************************************************
    ; *** Scatter-Loading Description File generated by uVision ***
    ; *************************************************************
    
    LR_IROM1 0x00000000 0x00001000  {    ; load region size_region
      ER_IROM1 0x00000000 0x00001000  {  ; load address = execution address
       *.o (RESET, +First)
       *(InRoot$$Sections)
       .ANY (+RO)
      }
      RW_IRAM1 0x00300000 0x00001000  {  ; RW data
       .ANY (+RW +ZI)
      }
    }
    

    I also include the RAM.ini with the correct register and values for the AT91RM9200...

    FUNC void Setup (void) {
      // <o> Program Entry Point
      PC = 0x00000000;
    }
    
    // Switching from Slow Clock to Main Oscillator for faster Download
    _WDWORD(0xFFFFFC20, 0x00000601);        // PMC_MOR:     Enable Main Oscillator
    _sleep_(10);                            // Wait for stable Main Oscillator
    _WDWORD(0xFFFFFC30, 0x00000001);        // PMC_MCKR:    Switch to Main Oscillator
    
    _WDWORD(0xFFFFFD08, 0x00010000);        // WDT_MR:      Disable Watchdog
    
    _WDWORD(0xFFFFFF00, 0x00000001);        // MATRIX_MRCR: Remap IRAM to 0 (for RM9200)
    
    Setup();                                // Init, and setup for Running
    
    LOAD easytest.axf INCREMENTAL     // Download
    
    g, main
    

    What about this line (in the example when I use only the internal RAM)?

    #define SDRAM_START  0x20000000
    

    If I understand you right, then this line is only correct, when I download the code from the jtag interface to the SDRAM, where the code is executed to install the spi connection (to store the ROM values in the dataflash).

    At the moment I only want to test the dataflash (I don't have any SDRAMs installed) to see that it works fine (with a small example - only to turn on a led)...

    best regards
    Hans

  • I started a new project which includes only a while(1) loop - nothing else. So I get the error "Insufficient RAM for flash Algorithm!" . But how should such a really small example work with the SAM9260 (with only 4k internal RAM)???

    The test project which you have built will not cause the message "Insufficient RAM for Flash Algorithm!". This will be caused by your Data Flash Algorithm which is not written properly (all algorithms in the Keil installation use far less then 4kB of memory).

    You should look at the chips manual to see from which memories you can execute code. Since you have no SDRAM and probably no other external RAM or Flash (except SPI Data Flash) then you can execute code only from internal RAM (16kB). This limits your application to 16kB in size. You can still use the Data Flash to make the code bootable but you can't execute code directly from SPI Data Flash (it needs to be downloaded into RAM first as already described).

  • all algorithms in the Keil installation use far less then 4kB of memory

    When I right, then I have to download the dataflash algorithm (first) in the internal RAM to enable the spi controller (and the spi connection).

    RAM Size = RW Data + ZI Data = 12 + 132
    ROM Size = Code + RO Data + RW Data = 1948 + 4256 + 12
    

    But I found my error for this error message (I forgot to change the RAM size in the uvision project (within the Flash Download Setup window).

    So now the software told me that there are no errors during the download to the spi dataflash. But when I try to start the programm, then I get a error messages (within the registers) access violation at 0xFFFFFFFC for example. These errors occured when I run the startup-script.

    I don't think that the write progress is successful - because when I restart the processor no data will be transmitted to the processor from the dataflash - there's only one short peak (when the processors searchs for a valid sequence).

    Within the FlashPrg.c file: I use the start addr from the internal RAM for

    #define SDRAM_START
    

    and the offset is 0xE00.

    best regards
    Hans

  • I'm sitting in front of the data flash code but I don't see the error / responsible for the errors.

    Reinhard, could you give me a example for the AT91RM9200 together with the AT45DB021B data flash from Atmel? I've only the internal RAM from the controller to test the data flash.

    best regards
    Hans

  • Send your projects (Data Flash algorithm and example application) with detailed description of the problem to support.intl@keil.com