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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3592 Questions
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  • Not Answered

    Interrupt latency while STR/LDR in cortex-M3 0

    2591 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Cortex M7 SPI Interface Register Base Address 0

    • Cortex-M7
    6064 views
    6 replies
    Latest over 5 years ago
    by atlasium47
  • Answered

    why there are separate registers for interrupt set-enable and clear-enable while can be just one 0

    • Cortex-M3
    • Cortex-M System Design Kit
    4937 views
    2 replies
    Latest over 5 years ago
    by Morteza
  • Not Answered

    Does Cortex-M33/M35P support bit band? 0

    • Cortex-M35P
    • Cortex-M33
    • Armv8-M
    • Memory Architecture
    3086 views
    0 replies
    Started over 5 years ago
    by zhyihui2100
  • Answered

    JTAG Debugger for Cortex-R7 0

    4605 views
    3 replies
    Latest over 5 years ago
    by shubham@p
  • Answered

    Bus Fault when configuring cross trigger matrix / CTICONTROL 0

    3644 views
    2 replies
    Latest over 5 years ago
    by Jacek Wywrót
  • Not Answered

    SAMD21G18A Controller,s Bootloader Delete after program with Arduino IDE 0

    2940 views
    1 reply
    Latest over 5 years ago
    by Andy Neil
  • Answered

    Why is there an ACP interface for many ARM processors? 0

    • AXI
    35813 views
    8 replies
    Latest over 5 years ago
    by marekx
  • Not Answered

    ETM Trace bus signal integrity 0

    • ETM
    1832 views
    0 replies
    Started over 5 years ago
    by Chandrasekar J
  • Not Answered

    Cortex A-35 prevent fetch code allocation in cache 0

    11676 views
    4 replies
    Latest over 5 years ago
    by flongnos
  • Not Answered

    What conditions would generate the CM33 FPU underflow and input denormal exception flags? 0

    • Cortex-M33
    2036 views
    0 replies
    Started over 5 years ago
    by Ankur B
  • Not Answered

    [Beginner] I would like to mod a GPM4 firmware 0

    1992 views
    0 replies
    Started over 5 years ago
    by Capripot
  • Answered

    Getting asm error in sysctl.c 0

    4294 views
    6 replies
    Latest over 5 years ago
    by Debora1h
  • Not Answered

    Is it possible to move up from EL0 AARCH32 to EL1 AARCH64 0

    12136 views
    1 reply
    Latest over 5 years ago
    by vstehle Arm Employee Badge
  • Not Answered

    How can I declare variable in secure world memory(Trustzone-m) 0

    • TrustZone for Armv8-M
    • TrustZone
    3497 views
    3 replies
    Latest over 5 years ago
    by Oliver Beirne Arm Employee Badge
  • Answered

    Legal transactions for AXI FIXED mode 0

    • AXI
    • AXI4
    12909 views
    2 replies
    Latest over 5 years ago
    by Utkarsh S
  • Not Answered

    sp register minus fault in stp instruction 0

    10994 views
    2 replies
    Latest over 5 years ago
    by Jason69s
  • Not Answered

    Cortex-a9 banked registers 0

    10454 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    How is AXI addressing scheme work for this problem? 0

    10641 views
    1 reply
    Latest over 5 years ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    problem with sim800 0

    • STM32
    • gsm
    2074 views
    0 replies
    Started over 5 years ago
    by salar1991
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Topics being discussed in this forum
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