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Interrupt collector

RCReddy

Hi All,

I am using Arm Cortex-A53 based board.I modified a driver module and the interrupt processing.

I have a fundamental question:

Since Arm Cortex-A53 can handle 16 primary interrupts, what happens if all the interrupts arrive at same time. Though ISR's are typically fast, there should be some buffering before interrupt is handled by CPU.

How much is the depth of such quick buffering of such buffer.

If possible, please point to the info [if available online].

Thanks

  • +1

    For each interrupt there is a pending bit (see IHI0069D_gic_architecture_specification_V3.pdf). But only one. So if the same interrupt comes again while pending it is lost. But all interrupts can be pending at the same time.