How to know if a RAM is compatible with an architecture or a processor?

I don't have much experience in building an embedded system from 0. I want to ask a general question as showed in the title through an example.

I choose Cortex-A9 (ARMv7-Profile A architecture) as CPU.  Then I want to use DDR3 RAM of Alliance memory (AS4C128M16D3B-12BCN) or ISSI

(IS43/46TR82560B).  Question1: How to know if they are compatible with Cortex-A9 or more generally ARMv7-Profile A? I view the data sheet of the 2 RAM. (  https://www.mouser.com/ds/2/12/Alliance%20Memory_%202G%20128Mx16_AS4C128M16D3B-12BCN%20v1-1288833.pdf and www.mouser.com/.../43-46TR16128B-82560BL-276702.pdf ) and search the key word ARM, but nothing found. I search the key word

DDR in the data sheet of the CPU ( https://static.docs.arm.com/100511/0401/arm_cortexa9_trm_100511_0401_10_en.pdf ) but nothing related found.

I think there must be a problem of comptability between an architecture and a RAM. If I want to cooperate a DDR3 RAM with an ARMv1 architecture

CPU, it won't work. Question 2: Why in the data sheet of RAM, the manufacturer doesn't indicate the compatible architecture? Question 3: Why in the data sheet of CPU, the manufacturer doesn't indicate the type of memory(DDR3, DDR4, etc) it supports?

Furthermore, I have 2 questions:

For the ARMv7 Profile A architecture, when translating the virtual address to physical address, a translation table is used. On the page 1324 of the ARMv7 architecture reference manual ( developer.arm.com/.../arm-architecture-reference-manual-armv7-a-and-armv7-r-edition ) , the author describes the organization of the memory on which the Short-descriptor translation table is based:

Sections： Consist of 1MB blocks of memory.
Large pages： Consist of 64KB blocks of memory.
Small pages： Consist of 4KB blocks of memory.

Question4: Does this way of organization need the support from RAM?

On the page 2 of the data sheet of Alliance memory, it indicates the page size of memory: "1KB page size for X8 / 2KB page size". On the first page of data sheet of ISSI, it indicates "Page size 1KB". But according to the organization of the memory mentioned above, the small page is 4KB. Question5: Can we say that the 2 RAMs doesn't support the architecture ARMv7 Profile A due to that?

Question6: Why the data sheet of the 2 RAMs doesn't indicate the MTBF of the memory?