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How to implement to write firmware by JTAG within CM3 design kit?

  • Dear all,  

I believe that you know such as STM32F103 cpu series support firmware program function by using JTAG with JTAG debugger of keil MDK.

So I want to know does cortexm3 design kit include such as  JTAG firmware program function blocks? 

What am I supposed to do to implement auch as  JTAG firmware program function blocks?

I want to program(write the firmware code)  to CM3  with JTAG debugger of keil MDK. Is this possible ?

Parents
  • Hi,

    Since FPGA do not have real embedded flash, usually we just use SRAM inside the FPGA (block RAM).

    You will need an AHB to SRAM wrapper (that should be inside the Cortex-M3 DesignStart bundle) and you can download the code image to the FPGA's SRAM directly (just make sure your project's option remove the flash programming and erase options).

    For a simple system, you don't need to have a separated boot ROM. An application image can be placed in address 0 and start from there directly.

    Normally embedded flash vendor will provide you with simulation models of embedded flash so that you can test your design.

    If you want, you can connect external flash memories to your FPGA design. In that case you might need to design an AHB to external flash interface. But the speed of such external flash access can be a bit slow and the external flash chip interface can be quite different from the interface of an embedded flash. So often this is not the best solution.

    regards,

    Joseph

Reply
  • Hi,

    Since FPGA do not have real embedded flash, usually we just use SRAM inside the FPGA (block RAM).

    You will need an AHB to SRAM wrapper (that should be inside the Cortex-M3 DesignStart bundle) and you can download the code image to the FPGA's SRAM directly (just make sure your project's option remove the flash programming and erase options).

    For a simple system, you don't need to have a separated boot ROM. An application image can be placed in address 0 and start from there directly.

    Normally embedded flash vendor will provide you with simulation models of embedded flash so that you can test your design.

    If you want, you can connect external flash memories to your FPGA design. In that case you might need to design an AHB to external flash interface. But the speed of such external flash access can be a bit slow and the external flash chip interface can be quite different from the interface of an embedded flash. So often this is not the best solution.

    regards,

    Joseph

Children
  • Sir, I'm wondering about the speed between "embedded flash" and "external flash memory". 

    Is there quite of a bit speed difference between  "embedded flash" and "external flash memory" ?

  • Yes, internal flash is usually faster.

    Usually external flash use serial interface (i.e. QSPI flash) and hence the access time is longer. But many QSPI interface controller has got some sort of cache to avoid most of the penalty. Some QSPI flash chips can run at 100MHz, but of course, due to serialization it will take a number of clock cycles to read. (https://www.corelis.com/images/screenshots/spi-quadmode-fastread.jpg )

    In some of our old FPGA boards we used two 16-bit parallel flash to form a 32-bit flash interface (K8P5615UQA), The access time is 70ns (around 14MHz), but when considering PCB level delay you will likely to get lower speed.

    On chip flash speed varies between chip vendors. Most of the low power embedded flash is around 30MHz to 50MHz. But some MCU has embedded flash processes that can run at over 100MHz.