Architectures and Processors forum MRS [A/C]PSR latency armv8-a?

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MRS [A/C]PSR latency armv8-a?

MarkL over 6 years ago

HI,

Do anyone has a clue on the latency of the MRS CPSR (or APSR) command?

I want to read the flags with no jump (and it is critical).

Thanks

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Martin Weidmann over 6 years ago +1 verified

Which processor(s) are you using? If you look at the TRM(s), they sometimes include the cycle information. For example, Cortex-A9 lists MRS as 1 cycle: infocenter.arm.com/.../ric1447333720404.html

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+1 Martin Weidmann over 6 years ago

Which processor(s) are you using? If you look at the TRM(s), they sometimes include the cycle information. For example, Cortex-A9 lists MRS as 1 cycle:

infocenter.arm.com/.../ric1447333720404.html
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+1 Martin Weidmann over 6 years ago

Which processor(s) are you using? If you look at the TRM(s), they sometimes include the cycle information. For example, Cortex-A9 lists MRS as 1 cycle:

infocenter.arm.com/.../ric1447333720404.html
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