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Arm v7 SP in secure and non secure mode : shared or not ?

Hello,

Mode have their own stack on this chip, but it's not clear to me whether , let say secure supervisor and non secure supervisor share a common stack or they need their own one ? (same for all modes of PL1)...

Thanks for any info.

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42Bastian Schick over 7 years ago in reply to AALLeeXX +1 verified

Any mode exists in both secure and non-secure. Therefore a "context switch" needs to save/restore all processor registers from all modes.

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+1 42Bastian Schick over 7 years ago in reply to AALLeeXX

Any mode exists in both secure and non-secure.
Therefore a "context switch" needs to save/restore all processor registers from all modes.
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+1 42Bastian Schick over 7 years ago in reply to AALLeeXX

Any mode exists in both secure and non-secure.
Therefore a "context switch" needs to save/restore all processor registers from all modes.
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0 AALLeeXX over 7 years ago in reply to 42Bastian Schick

Ok then, just confirmed on my target, need a SP for secure state and a different one for non-secure.

Thanks for your highlights.
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