Hello to all,
I was looking at different offset values for both load and store operations. Since due to little endian arrangement, the memory looks something like this to processor:
Byte[0x23],Byte[0x22],Byte[0x21],Byte[0x20]
Byte[0x1F],Byte[0x1E],Byte[0x1D],Byte[0x1C]
. . . .
Byte[0x7],Byte[0x6],Byte[0x5],Byte[0x4]
Byte[0x3],Byte[0x2],Byte[0x1],Byte[0x0]
Since the different value consumes different cycles:
Offset(0xn) (n ∈ 0,4,8,...) = 1 cycles
Offset(0xn) (n ∈ 1,5,9,...) = 3 cycles
Offset(0xn) (n ∈ 2,6,A,...) = 2 cycles
Offset(0xn) (n ∈ 3,7,B,...) = 3 cycles
Therefore for offset 30 => 0x1E should consumed 2 cycles since it belongs to the category of 2 offset. Rather, it has consumed 1 cycles and thereafter on all the next coming offset value, offset 30 becomes reference. I mean, for offset 32 => 0x20 (ideally it should consumes only 1 clock-cycles, but in reality it is consuming 2 clock cycles) and so on.
Does anybody know the reason behind this??
Kindly help me out with that.
Thanking you,
Regards,
Himanshu
Not sure how you get the conclusion "Since the different value consumes different cycles".
In general, the cycle count of memory access depends on the memory bus width and cache line length.