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Hello, when I use stm32f103xx, I am confused of one of the boot modes it supported. One of the boot modes is booting from embedded SRAM while the I-BUS of Cortex-M3 is connected to FLASH only . When boots from SRAM, how Cortex-M3 fetches instructions from SRAM? Do D-BUS or system bus support instruction fetch？
Strange, but since the I-Bus performs prefetching which is not needed when executing from SRAM, instructions are fetched over the D-bus.This does not only apply to boot from SRAM but also is you run SW from SRAM in flash-boot mode.
Do you mean that the I-bus and D-bus support instruction fetch, but only the I-bus supports prefetching?