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How to Write CP15 registers (CRn:C15) in Non-Secure mode

Paddu

Some of the Cortex-A8 registers like CP15 registers (CRn:C15) are writeable
only in secure mode. How to write these registers when the CPU is in Non-Secure  mode?
Please let me know if there is any reference example code on this.
The Cortex-A8 manual mentions about the SMC requests but don't understand how to
implement that in the assembly code.

Parents
  • +1

    If you are running in NS mode, you need to have a Firmware running in secure mode that handles writes to protected registers on your behalf.

    SMC is an instruction which will call it. But you need to have a description of your firmware. W/o : No chance.

    (That is the idea behind secure/non-secure separation ;-) )

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  • +1

    If you are running in NS mode, you need to have a Firmware running in secure mode that handles writes to protected registers on your behalf.

    SMC is an instruction which will call it. But you need to have a description of your firmware. W/o : No chance.

    (That is the idea behind secure/non-secure separation ;-) )

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