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Difference in the current consumption for different register place for few instructions

Hello to all,

While working on different assembly instructions, I have come across a very different problem of the register's place. For example: 

SBC r11,r7,r11 : 3.0217mAmps

but 

SBC r11,r7,r7 : 2.7477mAmps

Similarly, for ORN and MVN also.

For all these (SBC, ORN, MVN) instructions.If

SBC Rd,Rn,Rd

or

ORN Rd, Rn, Rd

or

MVN Rd, Rd,

then the current consumption is comparatively high. This was seen only for these three instructions. Does anyone know about such behavior, present for these instructions?

I am working on ARM Cortex-M4.

Thanking you,

Regards,

Himanshu

  • Not sure how you program look like, but if you execute a sequence of

    SBC r11,r7,r11

    The value of r11 keep changing, and the toggling activities in the data path increase the power. 

    If you execute a sequence of

    SBC r11,r7,r7

    The value of r11 doesn't change (no toggling in the data path) - hence lower power.

    Hope this helps.

    regards,

    Joseph

  • Dear Mr. Yiu,

    Thank you very much for your kind reply. I also guessed the same reason, but while executing the other instructions eg: ADD or SUB or any other data-processing instructions (except SBC, ORN, and MVN) shows the normal behavior. More detailed problem-elaboration has been shown below:

    ADD R11,R7,R11 and ADD R11,R7,R7 shows the similar amount of current consumption.

    Note: Similar results have also been observed for other data processing instruction, except SBC, ORN and MVN

                                                          whereas

    SBC R11,R7,R11 and SBC R11,R7,R7 shows the huge variation in the amount of current consumption.

    also for 

    ORN R11,R7,R11 and ORN R11,R7,R7 shows the huge variation in the amount of current consumption.

    also

    MVN R11,R11  and MVN R11,R7 shows the huge variation in the amount of current consumption.

     

    Why the effect of toggling activity to only specific instructions? or Is there some kind of special behavior for these three (SBC,ORN,MVN instructions)?

    Thanking you once again, 

    Warm regards, 

    HImanshu 

  • Potentially that is down to the netlist level. Since the processor is delivered in Verilog RTL source, and chip vendors do the synthesis of RTL source to netlist, the use of adders and subtraction blocks and potentially part of the data paths could be very different in different implementations.

    Another potential factor is the instruction code being used. Is it both 16-bit in the comparison? or is one version using a 16-bit instruction and the other used a 32-bit instruction? When 32-bit instruction is used, more power could be used due to higher memory bandwidth for the program flash.

    regards,

    Joseph

  • Dear Mr. Yiu,

    Thank you very much for your quick reply. Regarding the instructions used, I have used all 32-bit instructions only. So, I guess then the other reason could be the possible reason in my case.

    Thanking you,

    Regards,

    Himanshu