It's said that most ARM processors are harvard architecture, which means that the instructon and data have physically separated memory space.
However , I just can't get the point.
Could anyone give an explanation about these example instructions below. How instruction and Data is separated in these instructions?
ADD R0, R1, R2 @ R0 = R1 + R2 LDR R0, [R1, R2] @ address pointed to by R1 + R2
The term "Harvard architecture" can mean different things: In ARM we usually have Harvard "bus" architecture, which mean instruction and data accesses can happen at the same time. However, the memory space is unified, which means both instruction and data share the same memory space.
This is different from Harvard memory architecture as used in 8051, PIC16, etc, which have separated memory spaces for instructions and data.
Harvard memory architecture is useful for 8-bit and 16-bit microcontrollers because the address space is usually limited to 64KB, which is not enough for sharing between instruction and data for complex applications. However, they usually need special instructions (e.g. MOVC in 8051) for reading data in program space, which can be a pain for high level programming languages. As a result, C language extension is needed to specify that the data is in program space (e.g. in the case of 8051 with Keil compiler, "code" is a memory type keyword for data that is stored in program space. http://www.keil.com/support/man/docs/c51/c51_le_memtypes.htm).
Please note Harvard architecture can also be used to specify cache designs. Level 1 cache in ARM processors are normally Harvard - separated instruction and data caches.
Please see also
White Paper - Separating instructions and data with PureCode