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ARMv7-M: Question about syn/asynchronous exception?

Hi all,

I have little experience with bare metal programming at STM32 series and currently studying exception behavior in "ARMv-7m Architecture Reference Manual".

I'm confused about syn/asynchronous exception at B1-569. I have one question about it and related one.

  1. What is syn/asynchronous exception?
  2. What is "active and pending"?(related to syn/asynchronous exception, B1-570)

However, let me provide some idea about these question. Is it just an adjective to describe exception? Take SVC and PendSV for example, SVC should be synchronous one because the arguments should not be modified. It should not be pending. Another one, PendSV, is triggered as needed. The common case is that the priority of PendSV would be minimal one, so it would be asynchronous.

Thanks,

yenWu

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  • "synchronous" means it happens with the instruction stream. An interrupt is an asynchronous event, as you cannot say when it happens. So it may happen during the execution of an instruction.

    Also check for precise and imprecise aborts.

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  • "synchronous" means it happens with the instruction stream. An interrupt is an asynchronous event, as you cannot say when it happens. So it may happen during the execution of an instruction.

    Also check for precise and imprecise aborts.

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