Please note: We are aware of an issue affecting replies on the Arm Community forums, which may not be loading as expected.

We apologize for any inconvenience and appreciate your patience while we investigate and work to resolve the issue.

Thank you for your understanding.

  • State Accepted Answer
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 1 reply
  • Subscribers 348 subscribers
  • Views 5645 views
  • Users 0 members are here
Options
Related
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

I need Info regarding DVFS and DPM in ARM Cortex-A15

farazawan007

I want to work on ARM Cortex-A15 for my research so I need following information about ARM Cortex-A15:

  1. Does this processor support both, DPM and DVFS?
  2. What are the maximum DVFS Levels available?
  3. What are the maximum DPM levels available?
  4. Energy consumption in each level?

I'll be grateful

  • +1
    DVFS/DPM seems more likely to be an SoC implementation defined, not defined in Cortex-A15 Core Processor level.

    If manufacturing processes and design implementation support, SoC can run at different CPU frequencies under different CPU Voltages, while the running software e.g. Linux can trigger the DVFS driver framework to adjust the CPU frequencies according to the current CPU workloads.

    How many DVFS/DPM levels are available? It also depends on SoC designers. Some SoC chips have 3 levels, others may have 5-7 or more levels. Even designers can force the CPU to run at a fixed frequency if they want.

    So the energy consumption for each DVFS/DPM level of different SoCs is different.

    Please refer to en.wikipedia.org/.../Power_management