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pre emption of the interrupts in the cortex m3 arm v7

i am a beginner in this subject and i started reading the TRM from the infocenter

one thing confused me

Interrupt grouping    in this link it is written as

"Only the group priority determines preemption of interrupt exceptions. When the processor is executing an interrupt exception handler, another interrupt with the same group priority as the interrupt being handled does not preempt the handler,

If multiple pending interrupts have the same group priority, the subpriority field determines the order in which they are processed. If multiple pending interrupts have the same group priority and subpriority, the interrupt with the lowest IRQ number is processed first."

and in this link ARM Exception entry and return

there is one more contradictory statement for the above statement (i feel)

"When the processor is executing an exception handler, an exception can preempt the exception handler if its priority is higher than the priority of the exception being handled. See Interrupt priority grouping for more information about preemption by an interrupt. "

in the first link why did they write like that if its PRIGROUP is 011 and if one interrupt sub group number is 2 and it's handler is currently running mean while if the interrupt with subgroup 1 of same priority group  occurs then why doesnot it preempt the 2 and go to 1's handler?  why does it preempt only when multiple interrupts of same group priority are  present ?

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  • Hi srikar,

    Regarding the first link, there would be no subpriority in the actual implementation. Therefore, the pre-emption would be performed according to the group priority.

    Regarding the second link, the priority means the number of  the priority group.

    I feel there would be no inconsistency between two links.

    As for your question:

    why does it preempt only when multiple interrupts of same group priority are  present ?

    I think you have some misunderstanding.

    The pre-emption would occur bewteen two interrupts of which priority group is different. While the ISR of a certain group priority, if an interrupt of which prriority group is higher would be accepted, then the pre-emption would occur.

    Best regards,

    Yasuhiko Koumoto.

Reply
  • Hi srikar,

    Regarding the first link, there would be no subpriority in the actual implementation. Therefore, the pre-emption would be performed according to the group priority.

    Regarding the second link, the priority means the number of  the priority group.

    I feel there would be no inconsistency between two links.

    As for your question:

    why does it preempt only when multiple interrupts of same group priority are  present ?

    I think you have some misunderstanding.

    The pre-emption would occur bewteen two interrupts of which priority group is different. While the ISR of a certain group priority, if an interrupt of which prriority group is higher would be accepted, then the pre-emption would occur.

    Best regards,

    Yasuhiko Koumoto.

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