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ARM v8 PMU Cycle counter

All,

When I am using the cycle counter in AArch64, I am not getting cycles properly. I have enabled read of pmccntr_el0 in user space using a small kernel module. I have sample code like:

I expected delta to be in the range of 1400000000 as a57 in our design runs at 1400MHz

But I am getting around 32100000 which means the cycle counter frequency is ~3.21MHz

The value of Control register is pmcr=41013001 indicating divider is off.

With Generic timer counter registers, I am getting the values as expected. The below code gives

I get count of 512021629 cycles for 2 sec as expected for 256MHz frequency which I got from cntfrq_el0.

Is there something basic I am missing for PMCCNTR_EL0?

thanks and regards,

Ravi

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