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ARM Cortex A8 L2 Cache Flush Invalidate

Hafiz M Qasim

Hi,

I am working on DM37xevm platform and already invalidate the L2 cache (256KB) using the code

asm volatile moveq r12, #0x1");                                                 

asm volatile ("smc #1");     // Got from Technical Reference manual

I am particularly interested to flush the  L2 cache. No guidelines are given in TRM for flushing. Is it possible to flush the L2 cache.

Regards

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