Hello ,
i can see that AXI have some bits : AWID ARID BID ARID RID , those bits role is trasaction ordering , well i want to know how axi form those bits , i heard (i dont know if it is true) that a master can use those bits to find his path to the slave (though multiple interconnects) , (i heard many people talk for those bits as thread bits ), i would like too know how can i test those bits with vivado ? (any ideas ) , how does those bits affect ordering restrictions on AXI?
tnx you