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INVPC Hard fault exception error

Note: This was originally posted on 16th July 2009 at http://forums.arm.com

Using and Arm Cortex M3, the application that is running sometimes will generate a hard fault and deciphering the CFSR register tells me that the following user fault is triggerred.

From the Cortex manual:INVPC - Attempt to load EXC_RETURN into PC illegally. Invalid instruction, invalid context, invalid
value. The return PC points to the instruction that tried to set the PC.


Not sure where to proceed as the PC is pointing to the line in the exception handler. I am trying to figure out the instruction that triggerred the hard fault. Anybody have any suggestions?
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  • Note: This was originally posted on 17th July 2009 at http://forums.arm.com

    It is hard to guess what went wrong from the limiting information.

    It would be useful to see the value of the stacked PSR, which might show which handler is the last executed ISR.
    Also you should check the SP values to see if they are in correct memory space.

    Could you clarify
    "The return PC points to the instruction that tried to set the PC. "
    What instruction is it? Is it a instruction withing exception handler?

    If you are using KEIL tool, there is a feature that allow exception trace via ULINK2.
    I don't know if there is similar feature in IAR tool.
Reply
  • Note: This was originally posted on 17th July 2009 at http://forums.arm.com

    It is hard to guess what went wrong from the limiting information.

    It would be useful to see the value of the stacked PSR, which might show which handler is the last executed ISR.
    Also you should check the SP values to see if they are in correct memory space.

    Could you clarify
    "The return PC points to the instruction that tried to set the PC. "
    What instruction is it? Is it a instruction withing exception handler?

    If you are using KEIL tool, there is a feature that allow exception trace via ULINK2.
    I don't know if there is similar feature in IAR tool.
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