When a interrupt occurs, ARM documentation(http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/3682.html) says interrupt is disabled till the very end of handlers. When the ARM documentation says that the processor automatically disables the single "Normal IRQ" interrupt, is it the case that all interrupts mapped (via the ARM Interrupt Controller) to the single IRQ gets disabled, or just the one interrupt which was raised is disabled ?
I guess the original question is related to classic ARM processors (e.g. ARM7TDMI). Newer Cortex-M processor support nested interrupts in its hardware.