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New to ARM and having trouble locating example folders - help please ;)

Hello Everyone,

I am new to ARM processors.  I am trying to get a good handle on the low levels aspects of the ARM processor like exception handling.  From searching the ARM website and looking at the data abort handler documentation I am pointed to this part of the website - included below.  I downloaded the latest ARM developer Suite DS-5 v5.22.0 and searched throughout the installation for the example folders explained below, but cannot find them.  Does anybody know where I can download these example folders?

ARM® Developer Suite Developer Guide
1.1.1. Example code The code for many of the examples in this book is located in install_directory\examples. In addition, the examples directory contains example code that is not described in this b...

databort

This directory contains design documentation and example code for a standard data abort handler.

Any help would be appreciated,

Thank you.

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  • Hi Ash and Yasuhiko,

    Thank you very much for the info, I now understand why I can't see the examples in DS-5.  I understand I should look for examples for the particular processor system, but I also understand that it is good to know what the core reference design should be.  I am very familiar with the powerpc architecture, and knowing how one powerpc handles exception leads to it being very very similar to how another powerpc will implement exceptions and handling.  I am currently working on the Xilinx Zynq-7000 series.  I was specifically looking at the data abort handler in Xilinx SDK 2015.1 and their standalone BSP and noticed that they were not saving off the fault instruction address (which for ARMs is the link register minus 8 following the vector to the data abort location).  I have since contacted the Xilinx representative, and they have released another BSP that saves the faulted instruction address - that was requested this last May (very recently).  I wanted to look at a ARM reference example for exception handling so I can compare to what the vendor has provided.  For example in the case of Xilinx standalone BSP support in SDK 2015.1, it was insufficient.  Looking at a good reference example would have revealed this right away.  When I look at the example projects in DS-5, they are mainly startup assembly.  The exception handlers simply branch to themselves, which are not full examples of what one should do in a fleshed out exception handler.  These examples are merely infinite looping stubs.

    As another point of reference the halcogen support tool for Texas Instruments ARM Hercules parts, only generates infinite looping stubs as well.  These infiinite looping stubs are not acceptable for deployment of any real embedded system. The specific fault information surrounding the exception needs to be logged, so that system crashes can be explained and diagnosed from systems in the wild.  Otherwise, the software engineer will need to load it on a debugger and hope it fails in the same condition it did in the field, which might be very hard to reproduce.

    Does anyone know where I can obtain a old copy of the ADS example folders?  I think having the specific assembly examples targeting the specific features listed on the ARM website is exactly what I am looking for.  It doesn't matter if they exactly fit my particular ARM cpu core, or they are old.  Exception handling in assembly is not something that should change significantly over time.

    Thanks a bunch,

    Matt

  • Hi,

    The exception model is significantly different between architecture versions and profiles. Which are you using?

    • ARMv8-A
    • ARMv7-A or ARMv7-R
    • ARMv7-M
    • ARMv6-M
    • ARMv5

    You can find the ARM Architecture Reference Manuals for each version and profile here. Also, if you know which of the above you are using, you can consult any similar example project in DS-5. You mentioned you're using a Xilinx board so you're probably using one of the ARMv7 architecture profiles, and DS-5 includes the following example projects that you can import by following my earlier instructions:

    • ARMv8-A examples:
      • fireworks_v8_ARMCompiler6
      • startup_ARMv8_AArch64_with_AArch32_app
      • startup_v8_ARMCompiler6
    • ARMv7-A examples:
      • startup_Cortex-A5MPCore
      • startup_Cortex-A7
      • startup_Cortex-A8
      • startup_Cortex-A9
      • startup_Cortex-A9MPCore
      • startup_Cortex-A15
      • startup_Cortex-A15MPCore
      • startup_Cortex-A17MPCore
    • ARMv7-R examples:
      • startup_Cortex-R4
      • startup_Cortex-R5
      • startup_Cortex-R7
    • ARMv7-M examples:
      • startup_Cortex-M0
      • startup_Cortex-M0+
      • startup_Cortex-M1
      • startup_Cortex-M3
      • startup_Cortex-M4
      • startup_Cortex-M7

    All of these projects will at some point install a vector table that you could take a look at for reference, though again the actual exception model varies significantly between architecture versions and profiles. You need to know which version and profile you're using before looking for examples.

  • Hi Ash,

    The Zynq is ARM Cortex-A9, which is ARM v7.

    In the startup code for that processor (startup.s), the vector table has a data abort entry that just branches to itself.

    Reset_Addr      DCD     Reset_Handler

    Undefined_Addr  DCD     Undefined_Handler

    SVC_Addr        DCD     SVC_Handler

    Prefetch_Addr   DCD     Prefetch_Handler

    Abort_Addr      DCD     Abort_Handler

    IRQ_Addr        DCD     IRQ_Handler

    FIQ_Addr        DCD     FIQ_Handler

    Abort_Handler

        B   Abort_Handler

    No handling done inside it.  Infinite loop.

    Any other place I can look for an fleshed out example?

    Thank you,

    Matt

  • Hello Matt,

    your vector table is incorrect,

    The vector table of ARMv7-A includes instructions for each handler as following.

    LDR pc,Reset_Addr
    LDR pc,Undefined_Addr
    LDR pc,SVC_Addr
    LDR pc,Prefetch_Addr
    LDR pc,Abort_Addr
    NOP                    ;Reserved vector
    LDR pc,IRQ_Addr
    LDR pc,FIQ_Addr
    Reset_Addr      DCD     Reset_Handler
    Undefined_Addr  DCD     Undefined_Handler
    SVC_Addr        DCD     SVC_Handler
    Prefetch_Addr   DCD     Prefetch_Handler
    Abort_Addr      DCD     Abort_Handler
    IRQ_Addr        DCD     IRQ_Handler
    FIQ_Addr        DCD     FIQ_Handler
    

    Best regards,

    Yasuhiko Koumoto.

  • Hi yasuhikokoumoto,

    You are right, but that is because I didn't actually paste in the vector table from the example startup.s, on accident.  Though, my point is this example assembly for the data abort handler does nothing, but branch to itself.  One minimal thing that should be done is the instruction address that caused the exception should be saved off, so we should expect to see some assembly that saves off the LR register - 8 to RAM.  Another thing that could be saved is the CP15 data fault status register which includes info on whether the access was read or write and the memory domain within which the access was related to.

    This is again why I am looking for the old examples.  These handlers are just stubs.

    The assembly file I am referring to is located in Bare-metal_examples_ARMv7.zip in the path \DS-5Examples\startup_Cortex-A9\startup.s.

    The zip is located at:

    C:\Program Files\DS-5 v5.22.0\examples

    If anyone has a fleshed out example for these types of handlers that has been provided by ARM, please let me know.  I am very interested in obtaining some reference assembly on how to handle these exceptions.

    If not, I'll assume none exist and stop looking for help, and have to use the ARM manual to validate whether vendor provided exception handlers are sufficient.

    Thank you,

    Matt