Hello Everyone,
I am new to ARM processors. I am trying to get a good handle on the low levels aspects of the ARM processor like exception handling. From searching the ARM website and looking at the data abort handler documentation I am pointed to this part of the website - included below. I downloaded the latest ARM developer Suite DS-5 v5.22.0 and searched throughout the installation for the example folders explained below, but cannot find them. Does anybody know where I can download these example folders?
databort
This directory contains design documentation and example code for a standard data abort handler.
Any help would be appreciated,
Thank you.
Hi Ash,
The Zynq is ARM Cortex-A9, which is ARM v7.
In the startup code for that processor (startup.s), the vector table has a data abort entry that just branches to itself.
Reset_Addr DCD Reset_Handler
Undefined_Addr DCD Undefined_Handler
SVC_Addr DCD SVC_Handler
Prefetch_Addr DCD Prefetch_Handler
Abort_Addr DCD Abort_Handler
IRQ_Addr DCD IRQ_Handler
FIQ_Addr DCD FIQ_Handler
Abort_Handler
B Abort_Handler
No handling done inside it. Infinite loop.
Any other place I can look for an fleshed out example?
Thank you,
Matt
Hello Matt,
your vector table is incorrect,
The vector table of ARMv7-A includes instructions for each handler as following.
LDR pc,Reset_Addr LDR pc,Undefined_Addr LDR pc,SVC_Addr LDR pc,Prefetch_Addr LDR pc,Abort_Addr NOP ;Reserved vector LDR pc,IRQ_Addr LDR pc,FIQ_Addr Reset_Addr DCD Reset_Handler Undefined_Addr DCD Undefined_Handler SVC_Addr DCD SVC_Handler Prefetch_Addr DCD Prefetch_Handler Abort_Addr DCD Abort_Handler IRQ_Addr DCD IRQ_Handler FIQ_Addr DCD FIQ_Handler
Best regards,
Yasuhiko Koumoto.
Hi yasuhikokoumoto,
You are right, but that is because I didn't actually paste in the vector table from the example startup.s, on accident. Though, my point is this example assembly for the data abort handler does nothing, but branch to itself. One minimal thing that should be done is the instruction address that caused the exception should be saved off, so we should expect to see some assembly that saves off the LR register - 8 to RAM. Another thing that could be saved is the CP15 data fault status register which includes info on whether the access was read or write and the memory domain within which the access was related to.
This is again why I am looking for the old examples. These handlers are just stubs.
The assembly file I am referring to is located in Bare-metal_examples_ARMv7.zip in the path \DS-5Examples\startup_Cortex-A9\startup.s.
The zip is located at:
C:\Program Files\DS-5 v5.22.0\examples
If anyone has a fleshed out example for these types of handlers that has been provided by ARM, please let me know. I am very interested in obtaining some reference assembly on how to handle these exceptions.
If not, I'll assume none exist and stop looking for help, and have to use the ARM manual to validate whether vendor provided exception handlers are sufficient.